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Ordering number : ENN*6624
CMOS IC
LC35W1000BM, BTS-70U/10U
Asynchronous Silicon Gate 1M (131,072 words x 8 bits) SRAM
Preliminary Overview
The LC35W1000BM and LC35W1000BTS-70U/10U are asynchronous silicon gate CMOS static RAM devices with a 131,072-word by 8-bit structure. They provide two chip enable pins (CE1 and CE2) for device select/deselect control and one output enable pin (OE) for output control. They feature high speed, low power, and a wide operating temperature range.This makes them optimal for use in systems that require high speed, low power, and battery backup. They also support easy memory expansion.
Package Dimensions
unit: mm 3205A-SOP32
[LC35W1000BM-70U/10U]
32 17
0.8 11.2 3.1max 0.15 0.2 (2.7) 20.5
Features
* Low-voltage operation: 2.7 to 3.6 V * Wide operating temperature range: -40 to +85C * Access time: 70 ns (maximum): LC35W1000BM and LC35W1000BTS-70U. 100 ns (maximum): LC35W1000BM and LC35W1000BTS-10U. * Low current drain Standby mode: 0.1 A (typical*) at Ta = +25C 10.0 A (maximum) at Ta = -40 to +70C 20.0 A (maximum) at Ta = -40 to +85C * Data retention voltage: 2.0 to 3.6 V * No clock required (fully static circuits) * Input/output shared function pins, 3-state output pins * Package 32-pin SOP (525 mil) plastic package: LC35W1000BM 32-pin TSOP (8 x 14 mm) plastic package (Normal): LC35W1000BTS
1
(0.73) 1.27 0.4
16
SANYO: SOP32
unit: mm 3228A-TSOP32DA
[LC35W1000BTS-70U/10U]
32 17 0.5 8.0
12.4
(0.25)
0.08
(1.0)
0.5
1.2max
1
16 0.2
0.125
SANYO: TSOP32DA
Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
41902RM (OT) No. 6624-1/9
14.0
14.0
LC35W1000BM, BTS-70U/10U Pin Assignment
A13488
A13487
No. 6624-2/9
LC35W1000BM, BTS-70U/10U Block Diagram
Address buffer
Raw Decoder
Memory cell array
Output buffer
Data control circuit
Input data buffer
Pin Functions
A0 to A16 WE Address input Ready/write control input Output enable input Chip enable input Data I/O Power supply, ground
Control circuit
OE CE, CE2 I/O1 to I/O8 VCC, GND
Function Table
Mode Ready cycle Write cycle Output disable Unselected CE1 L L L H X CE2 H H H X L OE L X H X X WE H L H X X I/O Data output Data input High impedance High impedance High impedance Supply current ICCA ICCA ICCA ICCS ICCS
Note: X indicates H or L.
Specifications
Maximum Ratings at Ta = 25C
Parameter Maximum supply voltage Input pin voltage I/O pin voltage Operating temperature Symbol VCC max VIN VI/O Topr Conditions Ratings 4.6 -0.3* to VCC + 0.3 -0.3 to VCC + 0.3 -40 to +85 -55 to +125 Unit V V V C C
Storage temperature Tstg *: For pulse widths under 30 ns: -2.0 V Note: This chip may be destroyed if any stress in excess of the absolute maximum ratings is applied.
No. 6624-3/9
LC35W1000BM, BTS-70U/10U DC Allowable Operating Range at Ta = -40 to +85C
Parameter Supply volgate High-level input voltage Low-level input voltage Symbol VCC VIH VIL Conditions Ratings min 2.7 0.8VCC -0.3* typ 3.3 max 3.6 VCC + 0.3 0.2VCC Unit V V V
Note: * The minimum value is -3.0 V for pulse width under 50 ns.
DC Electrical Characteristics at Ta = -40 to +85C, VCC = 2.7 to 3.6 V
Parameter Input leakage current I/O leakage current Outpu high-level voltage Symbol ILI ILO VOH1 VOH2 VOL1 VOL2 ICCA2 ICCA3 Standby mode supply current (VCC - 0.2 V/0.2 V inputs) (CMOS inputs) ICCS1 ICCS2 VIN = 0 to VCC VCE1 = VIH or VCE2 = VIL or VOE = VIH or VWE = VIL, VI/O = 0 to VCC VOH1 = -2.0 mA VOH2 = -100 A VOL1 = 2.0 mA VOL2 = -100 A VCE1 = VIL, VCE2 = VIH, II/O = 0 mA, VIN = VIH or VIL VCE1 = VIL, VCE2 = VIH, II/O = 0 mA, VIN = VIH or VIL, DUTY100% VCE2 0.2 V or (VCE1 VCC - 0.2 V, VCE2 VCC - 0.2 V) VCE1 = VIH or VCE2 = VIL, VIN = 0 to VCC min cycle 1 s cycle Ta 85C Ta 70C Ta 25C 0.1 0.4 mA 70 ns 100 ns 2 20 10 A Conditions Ratings min -1.0 -1.0 VCC - 0.4 VCC - 0.1 0.4 0.1 1.2 25 20 typ max +1.0 +1.0 Unit A A V V V V mA mA
Outpu low-level voltage Operating supply current (CMOS inputs)
Note: * Reference values when VCC = 3.0 V and Ta = 25C.
I/O Capacitances at Ta = 25C, f = 1 MHz
Parameter Input capacitance I/O capacitance Symbol CIN CI/O VIN = 0 V VI/O = 0 V Conditions Ratings min typ 6 6 max 10 10 Unit pF pF
Note: These parameters are not measured for all devices, but are sampled values.
No. 6624-4/9
LC35W1000BM, BTS-70U/10U AC Electrical Characteristics at Ta = -40 to +85C, VCC = 2.7 to 3.6 V AC test conditions Input pulse voltage levels: VIL = 0.2 VCC, VIH = 0.8 VCC Input rise and fall times: 5 ns Input and output timing leves: 1/2 VCC Output load: 30 pF (including the jig capacitance) Read cycle
Parameter Read cyle time Address access time CE1 access time CE2 access time OE access time Output hold time CE1 output enable time CE2 output enable time OE output enable time CE1 output disable time CE2 output disable time OE output disable time Symbol tRC tAA tCA1 tCA2 tOA tOH tCOE1 tCOE2 tOCE tCOD1 tCOD2 tOOD 10 10 10 5 40 40 35 -70U min 70 70 70 70 50 10 10 10 5 35 35 30 max min 100 100 100 100 50 -10U max Unit ns ns ns ns ns ns ns ns ns ns ns ns
Write cycle
Parameter Write cyle time Address setup time Write pulse width CE1 setup time CE2 setup time Write recovery time CE1 write recovery time CE2 write recovery time Data setup time Data hold time CE1 data hold time CE2 data hold time WE output enable time WE output disable time Symbol tWC tAS tWP tCW1 tCW2 tWR tWR1 tWR2 tDS tDH tDH1 tDH2 tWOE tWOD -70U min 70 0 50 60 60 0 0 0 40 0 0 0 5 35 max min 100 0 70 90 90 0 0 0 50 0 0 0 5 30 -10U max Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns
No. 6624-5/9
LC35W1000BM, BTS-70U/10U Timing Charts Read cycle (1) : CE1 = OE = VIL, CE2 = VIH, WE = VIH
Read cycle (2) : WE = VIH
No. 6624-6/9
LC35W1000BM, BTS-70U/10U Write cycle (6) (WE = control) *6
*3
*4 *4
*5
A13492
Write cycle (2) (CE1 = control) *6
*3
*4 *4
*5
A13493
No. 6624-7/9
LC35W1000BM, BTS-70U/10U Notes: 1. The times tCOD1, tCOD2, tOOD, and tWOD are stipulated as the times until the output reaches the high-impedance state. They are not stipulated by output voltage level. 2. Do not apply reverse phase signals to the data outputs when the data outputs are in the output state. 3. tWP is the period that CE1 and WE are at the low level and CE2 is at the high level, and is defined as the time from the fall of WE until the rise of CE1 or WE or the fall of CE2, whichever occurs first. 4. tCW1 and tCW2 are the period that CE1 and WE are at the low level and CE2 is at the high level, and are defined as the time from the fall of CE1 or the rise of CE2 to the rise of either CE1 or WE or the fall of CE2, whichever occurs first. 5. The data outputs go to the high-impedance state when any one of the following states hold: OE is at the high level, CE1 is at the high level, CE2 is at the low level, or WE is at the low level. 6. If OE is at the high level during the write cycle, the data outputs will go to the high-impedance state.
Data Retention Characteristics at Ta = -40 to +85C
Parameter Symbol VDR1 VDR2 ICCDR1 tCDR tR Conditions VCE1 VCC - 0.2 V, VCE2 VCC - 0.2 V or VCE2 0.2 V VCE2 0.2 V VCC = 3.0 V, VCE1 VCC - 0.2 V, Data retention supply current VCE2 VCC - 0.2 V, or VCE2 0.2 V Chip enable setup time Chip enable hold time Note: * Ta = +25C -40C to +85C -40C to +70C +25C 0 5 0.1 ns ms Ratings min 2.0 2.0 typ max 3.6 3.6 16 8 A Unit V V
Data retention supply voltage
Data Retention Waveforms (1) (CE1 control)
Data retention mode
A13494
Data Retention Waveforms (2) (CE2 control)
Data retention mode
A13495
No. 6624-8/9
LC35W1000BM, BTS-70U/10U
Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of April, 2002. Specifications and information herein are subject to change without notice. PS No. 6624-9/9

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